Hardware transactional memory (HTM) systems may be available for wide scale adoption in the near future. HTM systems, combined with tested and stable software transactional memory systems, may be a more attractive alternative than lock-based parallel programming, in terms of programmability and performance.
Hybrid transactional memory (TM) systems (“HyTM”) are systems that employ both HTM and software transactional memory (STM). Traditional debugging techniques, such as breakpoints and ad hoc I/O debugging, do not apply to HyTMs because traditional debugging techniques can cause hardware transactions to abort when the debugging techniques use certain instructions (e.g., interrupts, I/O, context switches, etc.) that are illegal for hardware transactions. Hence, a question that arises with HyTM systems is how to debug a transactional memory program that executes some hardware transactions.